PCB Design Rules

Hallo,

I am trying to route the LP8550, which have DSBGA 25 Footprint with 0.5 mm Pitch. Using this design-rules (4 Layer complex) it is impossible to route it.

If I kept the drill size 0.2 mm and tried to achieve outer-diameter from 0.35 mm (see Photo), is it possible to manufacture it?

One more question, are Ball-Pads supported?

I think that I and all Others will appreciate an article just about BGAs :smiley:.

Best Regards
Asmandar

Hi @kompass ,

Welcome to the community!

If I kept the drill size 0.2 mm and tried to achieve outer-diameter from 0.35 mm (see Photo), is it possible to manufacture it?

For BGAs with a pitch of 0.5 mm, we are at the limit of our technical capabilities.
Your suggestion to reduce the pad diameter to 0.35 mm - as I understand you - is not sufficient for a safe through-hole plating. Another problem with a 0.5 mm pitch is the minimum drill spacing (please see also here)

One more question, are Ball-Pads supported?

Do you mean via-in-pad? In principle, you can use via-in-pads in your layout and have them manufactured by us. However, please note that we do not fill the borehole. This allows solder to flow through the hole during assembly. When using our assembly service, via-in-pads are therefore not permitted.

I think that I and all Others will appreciate an article just about BGAs

Thanks for the feedback - it’s noted! :wink:

Best regards,
Manuel

1 Like

Hello,

do i understand it correctly, that the minimum annular ring of a via has to be 0,2mm?

I would like to use vias with 0,2mm hole and 0,1mm ring. Would that be possible?

Would this match your rules?:

And would it be possible to do it like this?:

Thank you

edit:
Wenn I upload the file (like shown in the second picture) to your service, no error is displayed.

Hi @crally-crally-de ,

welcome to the community!

do i understand it correctly, that the minimum annular ring of a via has to be 0,2mm?

Correct!

I would like to use vias with 0,2mm hole and 0,1mm ring. Would that be possible?

As these vias do not comply with our design rules, they are manufactured at your own risk.

Would this match your rules?

The vias (0.2 mm drill diam, 0.6 mm pad diameter) are correctly dimensioned. Please note that sufficient distance is maintained between Via-Pad and other copper structures!

Wenn I upload the file (like shown in the second picture) to your service, no error is displayed.

That is correct. It is your responsibility to upload a compliant design!

Best regards,
Manuel

What happens when a outline crosses a pad like when Kicad says “Line on F.Silkscreen”.
Is the line then printed on the pad or not?

Hi @HansP ,

Welcome to the community!

When processing your data, we remove the silkscreen print on and in the immediate vicinity of openings in the soldermask (= most pads). You can see the result in our Board Viewer - only the silkscreen that is displayed there will be printed.

Best regards,
Manuel

1 Like

Thank you. This will help to not modify all the footprints :slight_smile:

1 Like

I assume that oval holes are complex, but I thought I’d ask for clarity.
Thanks!

Hi @Scriven ,

Right, oval holes lead to a complex rating of the board.

Cheers,
Manuel

1 Like

What is the min feature size for the soldermask.?
I plan to create a soldermask dam…

Vias 0.3/0.6mm no longer supported ?
With parameter s is the annular ring and it’s minimum is 0.2mm, the minimum via size (for 0.3mm drills) is 0.3/0.7mm ?

Hi @acav-acav-engineerin ,

Welcome to the community!

With parameter s is the annular ring and it’s minimum is 0.2mm, the minimum via size (for 0.3mm drills) is 0.3/0.7mm ?

That’s correct!

Cheers,
Manuel

Can i may ask what exactly “tented” Vias are? Arent they just through hole and blind ones with soldermask over it?

1 Like

A post was merged into an existing topic: PCB Specifications

Correct, tented vias are covered with soldermask.

Tented:

Not tented:
image

2 Likes

So you’d most likely want to use them if there is a via near a pad i guess?

This makes not that big of a difference as minimum clearances are not affected.

What you should think of is in my opinion could be a durability issue. If the via is tented from both sides you capture a tiny amount of air inside. If the PCB is exposed to different temperatures, this could lead to expansion of the air and damaging of the PCB. (In our company we have not experienced this yet and to really affect you, the PCB needs to be years in the field)

I am happy to hear different opinions on this. :slight_smile:

1 Like

many thanks for your input, really appreciate it :slight_smile:

1 Like

Just like effectbakro who asked this about a month ago I would also like to know the minimum width of the solder mask for dams (the slivers of solder mask that goes between the pads of SMD parts). Do you have the “usual” about 0.12mm here? Does it differ between the budget 2-layer and the 4-layer boards?

Hi @megstr,

Welcome to the community!

Unfortunately, I missed @effectbakro ’ s request. I am sorry for that!

Now to your question:

The width of the soldermask dam should be at least 115 µm in your layout. (As we enlarge all openings in the soldermask layers by 20 µm, the final min. width of the dam/bridge will be 75 µm.)
There is no difference between our products!

I think it makes sense to create a separate article on this topic…

Cheers,
Manuel

1 Like